Design and Analysis of a two stage Wideband LNA in 130-nm CMOS Technology
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2016, Vol 4, Issue 8
Abstract
This paper presents a Two stage wideband low-noise amplifier (LNA). Wideband input-impedance matching was achieved using lumped component. Cascode Topology(CS transistor cascade with CG transistor) is used. Inductive degeneration techniques for second stage of WLNA. RLC matching technique used for input, output and inter-stage matching. Active bias or transistor biasing technique used for biasing of transistor. Supply voltage used is 1.8V. Wideband frequency range is 1.6- 10.6GHz.Theoretical analysis shows that the frequency response of the power gain, as well as the noise Fig. (NF), can be described by second-order functions with quality factors or damping ratios as parameters, Implemented in 130 nm CMOS Technology. This achieves S11 below-10 dB, S22 below -10 dB, flat S21 of above 30dB, and flat NF of 3.3dB over the 3.1– 10.6GHz band. The analytical, simulated, and measured results are mutually consistent.
Authors and Affiliations
Jagdish Rokde, Prof. Sanjay Tembhurne
Keywords
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