Design and Implementation of Floating Point Multiplier for Better Timing Performance
Journal Title: International Journal of Advanced Research in Computer Engineering & Technology(IJARCET) - Year 2012, Vol 1, Issue 7
Abstract
IEEE Standard 754 floating point is the most common representation today for real numbers on computers. This paper gives a brief overview of IEEE floating point and its representation. This paper describes a single precision floating point multiplier for better timing performance. The main object of this paper is to reduce the power consumption and to increase the speed of execution by implementing certain algorithm for multiplying two floating point numbers. In order to design this VHDL is the hardware description language is used and targeted on a Xilinx Spartan-3 FPGA. The implementation’s tradeoffs are area speed and accuracy. This multiplier also handles overflow and underflow cases. For high accuracy of the results normalization is also applied. By the use of pipelining process this multiplier is very good at speed and accuracy compared with the previous multipliers. This pipelined architecture is described in VHDL and is implemented on Xilinx Spartan 3 FPGA. Timing performance is measured with Xilinx Timing Analyzer. Timing performance is compared with standard multiplier
Authors and Affiliations
B. Sreenivasa Ganesh , J. E. N. Abhilash , G. Rajesh Kumar
Keywords
Related Articles
- EP ID EP98923
- DOI -
- Views 72
- Downloads 0
Review on an Underwater Acoustic Networks
For the enhancement of underwater acoustic network the current research is focus on communication between various remote instruments to improve the high-rate reliable communication, energy efficiency and robust...
Survey on Routing in Multihop Wireless Networks Using Micropayment Schemes
In a multihop wireless network (MWN), the packets from a source node are relayed through a large number of intermediate nodes before they are delivered to the destination. But such relaying of other’s packets will...
Mathematical Modeling of Hot Air Drying of Spinach Leaves in Universal Hot Air Oven
The objective of this study was to develop a model for drying characteristic curve of Spinach in Universal Hot Air Oven .Drying experiment were conducted using a constant air velocity2.2m/s and three drying air t...
Efficient Road Traffic Policing With Coordinators and Routers Using Radio Frequency
Effective reduction of the road traffic in the real time phase is very essential. The present infrastructure available for the road traffic is not adequate, due to steady increase in the number of vehicles per day....
IMAGE SEGMENTATION TECHNIQUES AND GENETIC ALGORITHM
Image Segmentation is a decomposition of scene into its components. It is a key step in analysis. Edge, point, line, boundary texture and region detection are the various forms of image segmentation. Various technolog...