Design and implementation of low power, area efficient, multiple output voltage level shifter using 45nm design technology
Journal Title: IOSR Journal of Electronics and Communication Engineering(IOSR-JECE) - Year 2018, Vol 13, Issue 3
Abstract
To ensure intercommunication between circuit modules which are working in different voltage domains voltage level shifters are used. The improving VLSI technologies reduce the silicon area of the circuit, increases circuit performance. The power consumption should be reduced in order to enhance the life of the batteries used in hand held devices. Thus an advanced design for multiple output high voltage level shifters is proposed in this project.
Authors and Affiliations
Subrahmanya Bhat K G, Gurusiddayya Hiremath, Anush Bekal
Keywords
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- EP ID EP439165
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