DESIGN OF 7-BIT LOW-POWER, LOW AREA A/D CONVERTER IN SUBMICRON PROCESS FOR MULTICHANNEL SYSTEMS

Abstract

The design of analog-to-digital converter implemented in CMOS 180 nm technology has been presented in this paper. The successive approximation architecture with charge redistribution has been chosen. Much emphasis was placed on limiting the area occupancy of the whole chip so as its power consumption, which makes the described circuit suitable for multichannel applications. The presented converter achieves 3 MS/s sampling rate with 7-bit resolution at 77 μW and occupies only 90 x 95 μm2.

Authors and Affiliations

Piotr Otfinowski, Rafał Kłeczek

Keywords

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  • EP ID EP59446
  • DOI -
  • Views 114
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How To Cite

Piotr Otfinowski, Rafał Kłeczek (2013). DESIGN OF 7-BIT LOW-POWER, LOW AREA A/D CONVERTER IN SUBMICRON PROCESS FOR MULTICHANNEL SYSTEMS . Informatyka Automatyka Pomiary w Gospodarce i Ochronie Środowiska, 3(2), 18-21. https://europub.co.uk./articles/-A-59446