Low Power Adiabatic Complementary Pass Transistor Logic for Sequential Circuit

Abstract

The VLSI circuit design with extremely low energy dissipation is our approach which uses Adiabatic concept. Adiabatic logic is an attractive low power approach by restricting the currents to flow across devices with low voltage drop and by recycling the energy stored in their load circuit using AC power supply.The paper investigates low – power characteristics of complementary pass -transistor logic (CPL) circuits using AC power supply. It uses two – phase power - clocks . The two-phase power-clock scheme is more suitable for the design of flipflops and sequential circuits because it uses fewer transistors. In this paper, we use 180 nanometer Tanner Model file. Also comparing the power dissipation of Conventional CMOS and Adiabatic T,D, J-K Flip- Flops using Adiabatic CPL methodology and design of BCD counter using T Flip-Flop yet to be done.

Authors and Affiliations

MAMTA NARENDRA KUMARI, Minal Keote, Navneet Aman

Keywords

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  • EP ID EP27801
  • DOI -
  • Views 274
  • Downloads 1

How To Cite

MAMTA NARENDRA KUMARI, Minal Keote, Navneet Aman (2014). Low Power Adiabatic Complementary Pass Transistor Logic for Sequential Circuit. International Journal of Research in Computer and Communication Technology, 3(1), -. https://europub.co.uk./articles/-A-27801