Low Power and High Speed Multiplexer Based Adder

Journal Title: Scholars Journal of Engineering and Technology - Year 2014, Vol 2, Issue 1

Abstract

Full adder is a basic building block of many application specific integrated circuits. The paper evaluates and compares the performance of various full adder circuits which are designed using techniques such as XOR, transmission gates, multiplexers etc. Also a full adder circuit designed using multiplexer is proposed. The performance of these circuits is based on 180nm process model at supply voltage of 2.5V. The TSPICE simulation results show that the proposed circuit’s performance is better as compare to the circuits that are found in literature whose performance is evaluated.

Authors and Affiliations

Vimal Kant Pandey, Rajeev Kumar

Keywords

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  • EP ID EP384806
  • DOI -
  • Views 89
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How To Cite

Vimal Kant Pandey, Rajeev Kumar (2014). Low Power and High Speed Multiplexer Based Adder. Scholars Journal of Engineering and Technology, 2(1), 68-72. https://europub.co.uk./articles/-A-384806