Memory Design Using Logical Gates

Abstract

This research is about designing memory using logical gates. A memory unit is a collection of storage cells together with associated circuits needed to transform information in and out of the device. Memory cells which can be accessed for information transfer to or from any desired random location is called random access memory(RAM). The internal construction of a random-access memory of m words with n bits per word consists of m*n binary storage cells and associated decoding circuits for selecting individual words. A basic RAM cell has been provided here as a component which can be used to design larger memory units. An IC memory consisting of 4 words each having 3 bits has been also provided. In this research we will discuss about the designing of a RAM Cell and designing of 4*4 RAM.

Authors and Affiliations

Mandisha Sharma , Mansi Kakkar, Manish Sharma

Keywords

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  • EP ID EP18773
  • DOI -
  • Views 274
  • Downloads 9

How To Cite

Mandisha Sharma, Mansi Kakkar, Manish Sharma (2014). Memory Design Using Logical Gates. International Journal for Research in Applied Science and Engineering Technology (IJRASET), 2(9), -. https://europub.co.uk./articles/-A-18773