Adiabatic Logic Based Low Power Carry Select Adder for future Technologies
Journal Title: International Journal of Modern Engineering Research (IJMER) - Year 2013, Vol 3, Issue 5
Abstract
Adders are of fundamental importance in a wide variety of digital systems. Many fast adders exist, but adding fast using low area and power is still challenging. This paper presents a new bit block structure that computes propagate signals called “carry strength” in a ripple fashion. Several new adders based on the new carry select Adder structure are proposed. Comparison with well-known conventional adders demonstrates that the usage of carry-strength signals allows high-speed adders to be realised at significantly lower cost and consuming lower power than previously possible. As well as in this paper we are concentrating on the heat dissipation &we are reducing the current using adiabatic logic.
Authors and Affiliations
Mary Latha J, Prof. G. V. R. Sagar Sagar
Keywords
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