Fine Grain Dynamically Reconfigurable Architecture for CMOS Sram

Abstract

 Cell stability and area are among the major concerns in SRAM cell designs. This paper compares the performance of three SRAM cell topologies which include the conventional 6T-cell,8T-cell and 10T-cell. The cmos devices to achieve the better performance in terms of speed, power dissipation, size and reliability.SRAM(static random access memory)is memory used to store data. The comparison of different SRAM cell on the basis of different parameters is done.6T,8T and 10T SRAM cell are compared on basis of followings:1)Read delay, 2)Write delay, 3)power indulgence. The various SRAM solutions are analyzed in light of an impact on the required area overhead for each design solution given by Area(mm), Power(Mw) and delay(us). Different count of SRAM bitcells(6T, 8T, 10T) are analyzed. Among these 10T SRAM cell is better to immune SI (signal integrity), better STABILITY (Read + Write), Low Power consume bitcell. Inner architecture of FPGA OR CPLD comprised of No of CLB’s interconnecting with inter-logics. (inter-logics like RAM contains SRAM bitcells are used connect the two CLB’s inout)and One CLB contains no of slices . if one CLB comprised of 4 slice , it will communicate with one another using RAM like SRAM cells only

Authors and Affiliations

Dr. A. Senthil Kumar

Keywords

Related Articles

 Cell Counting Attack and Browser Attack against TOR Network

 The onion router (TOR) allows to hide your identity various software under this categories are available that allows online anonymity network, supporting TCP applications over the Internet. It doesn't allow networ...

 A Survey on Data Processing Protocols in Wireless Sensor Network

 Wireless sensor networks consist of small nodes with sensing, computation, and wireless communications capabilities. Many routing, power management, and data dissemination protocols have been specifically designed...

 Environmental Aspects of Iron ORE Mining

 Iron ore mining activities such as top soil stripping, drilling and blasting extraction of ore, waste rock dumping, loading and unloading of ore, crushing and screening, material transport etc., emit both fugitive...

 Enhanced Security for Two Party Confidential Data

 Data mining is the process of extracting hidden predictive information from large databases to support decision making process. There may be a chance of revealing sensitive information stored in dataware house dur...

 Analysis of Performance & Emission Characteristics of Diesel Engine Fuelled with different types of Biodiesel – A Review Study

 As a renewable, sustainable and alternative fuel for compression ignition engine, biodiesel instead of diesel has been increasingly fuelled to study its effects on engine performances and emissions in the recent 1...

Download PDF file
  • EP ID EP117183
  • DOI -
  • Views 63
  • Downloads 0

How To Cite

Dr. A. Senthil Kumar (30).  Fine Grain Dynamically Reconfigurable Architecture for CMOS Sram. International Journal of Engineering Sciences & Research Technology, 3(4), 5003-5006. https://europub.co.uk./articles/-A-117183