Impact of Hybrid Pass-Transistor Logic (HPTL) on Power, Delay and Area in VLSI Design

Journal Title: International Journal of Modern Engineering Research (IJMER) - Year 2014, Vol 4, Issue 6

Abstract

 Power reduction is a serious concern now days. As the MOS devices are wide spread, there is high need for circuits which consume less power, mainly for portable devices which run on batteries, like Laptops and hand-held computers. The Pass-Transistor Logic (PTL) is a better way to implement circuits designed for low power applications

Authors and Affiliations

G. Sivaiah, T. Kishore, K. Vijay Kumar

Keywords

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  • EP ID EP152591
  • DOI -
  • Views 102
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How To Cite

G. Sivaiah, T. Kishore, K. Vijay Kumar (2014).  Impact of Hybrid Pass-Transistor Logic (HPTL) on Power, Delay and Area in VLSI Design. International Journal of Modern Engineering Research (IJMER), 4(6), 1-6. https://europub.co.uk./articles/-A-152591