Implementation of Adaptive Viterbi Decoder
Journal Title: INTERNATIONAL JOURNAL OF ENGINEERING TRENDS AND TECHNOLOGY - Year 2013, Vol 4, Issue 2
Abstract
Viterbi algorithm is employed in wireless communication to decode the convolutional codes; those codes are used in every robust digital communication systems. Such decoders are complex & dissipiate large amount of power. Thus the paper presents the design of an Adaptive Viterbi Decoder (AVD) that uses survivor path with parameters for wireless communication in an attempt to reduce the power and cost and at the same time increase in speed. Most of the researches work to reduce power consumption, or work with high frequency for using the decoder in the modern applications such as 3 GPP, DVB, and wireless communications. Field Programmable Gate Array technology (FPGA) is considered a highly configurable option for implementing many sophisticated signal Processsing tasks. The proposed decoder design is implemented on Xilinx Spartan 3 , XC3S200 FPGA chip using VHDL code and Xilinx ISE 9.1 used for synthesis
Authors and Affiliations
Devendra Made#1
Keywords
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