Simulation and Analysis of Second Generation Current Conveyor using 0.18 µm CMOS Technology

Abstract

 A wide bandwidth CMOS realization of high performance dual output second generation (CCII±) current conveyor is presented. second generation current conveyor has the advantages of a wide current and voltage bandwidths, controlled intrinsic resistances at port X, Y and Z. SPICE simulation show that the current and voltage bandwidths are respectively 2.05 GHz and 4.3 GHz for a control current of 26 µA. CCII± is a useful building block for analog circuits, especially for application requiring dual outputs. we use a translinear configuration for second generation current conveyor. The current conveyor is simulated in terms of voltage offset, current offset, current bandwidth and voltage bandwidth in 180nm CMOS technology using Mentor Graphics tools.

Authors and Affiliations

Prachi Parikh

Keywords

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  • EP ID EP106295
  • DOI -
  • Views 72
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How To Cite

Prachi Parikh (30).  Simulation and Analysis of Second Generation Current Conveyor using 0.18 µm CMOS Technology. International Journal of Engineering Sciences & Research Technology, 3(3), 1297-1300. https://europub.co.uk./articles/-A-106295