Stagnant Timing investigation of Embedded Software on Advanced Processor Architectures

Abstract

Most processors today are embedded in products like mobile phones, microwave owns, welding machines etc and are not used in PC’s as many believe Since some of these embedded computers are used in time-critical or safety-critical systems it is very important that the behaviour of these systems are well known. One part of that is to know the Worst Case Execution Time (WCET) of the different tasks in the embedded system. First, shortcomings in current as well as future standards to controlling the power grid are outlined. From these economic and safety threats, we derive an immediate need to invest in research on the protection of the power grid, both from the perspective of cyber attacks and distributed control system problems. Second, current software design practice does not adequately verify and validate worst-case timing scenarios that have to be guaranteed in order to meet deadlines in safety-critical embedded systems. This equally applies to avionics and the automotive industry, both of which are increasingly requiring their suppliers to provide variable bounds on worst-case execution time of software.

Authors and Affiliations

M. Shankar| Associate Professor, KEC, Kuppam, AP, India Email: magaprajin@gmail.com, Dr. M. Sridar| Director of International Relations Bharath University, Chennai, TN, India, Email: deaninternational@bharathuniv.ac.in, Dr. M. Rajani| Director of R & D Bharath University, Chennai, TN, India Email: deanrd@bharathuniv.ac.in

Keywords

Related Articles

A 1.8V and 2GHz Inductively Degenerated CMOS Low Noise Amplifier

This paper presents the design and simulation of Low Noise Amplifier (LNA) in a 0.18?m CMOS technology. The LNA function is to amplify extremely low noise amplifier without adding noise and preserving required signal to...

MapReduce Based Implementation of Aggregate Functions on Cassandra

MapReduce is a simple and powerful processing model that allows parallel scalable programs to run on large volume of data on massive cluster of computers. Besides, Cassandra is a popular database of NoSQL solutions....

Performance Analysis of Adaptive Blind Equalizers Algorithms

In this paper, we discuss the performance of Blind Equalization algorithms, which can deal with the cases that the input signals are correlated and decrease the filtering error. We describe the algorithm process and anal...

Design of Data Acquisition System for a Base Transceiver System Room Using ARM Processor

The main aim of this work is to design a system for reducing the wastage of electricity in BTS room and also to handle the scarcity of electricity which causing serious dislocation in all spheres of life. Here we are...

Design and Verification of Serial Peripheral Interface using OVM

The main objective of the work is to design SPI Master Core using Verilog and verify the code using Open Verification Methodology. Serial Peripheral Interface (SPI) is an interface that facilitates the transfer of synchr...

Download PDF file
  • EP ID EP8270
  • DOI -
  • Views 584
  • Downloads 29

How To Cite

M. Shankar, Dr. M. Sridar, Dr. M. Rajani (2012). Stagnant Timing investigation of Embedded Software on Advanced Processor Architectures. International Journal of Electronics Communication and Computer Technology, 2(1), 36-40. https://europub.co.uk./articles/-A-8270