VLSI D esign of Power G ated NOR - based C ontent Addressable Memory

Journal Title: International Journal of Scientific Research and Management - Year 2014, Vol 2, Issue 10

Abstract

content addressable memory provides high speed search function in a single clock cycle.CAM is power hungry because of its parallel match line comparison. Thus we need to design low power high speed CAM designs. In this project the high speed will be acqui red by using parity bit. We introduce an effective gated power technique to reduce the peak and average power consumption. A feedback loop is employed to auto turn off the power supply to the comparison elements and hence average power consumption b y 75%. The proposed design can work at supply voltage o.35v

Authors and Affiliations

Jayalakshmi Devi

Keywords

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  • EP ID EP214215
  • DOI -
  • Views 69
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How To Cite

Jayalakshmi Devi (2014). VLSI D esign of Power G ated NOR - based C ontent Addressable Memory. International Journal of Scientific Research and Management, 2(10), -. https://europub.co.uk./articles/-A-214215