Ground Bouncing Noise Reduction in Combinational Circuits Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: G Sudhakar, B Venkanna, N Bhojanna Subject(s): Engineering, Applied Linguistics
Design And Implementation of CMOS Adder Cell With Reduced Leakage Power Technique In 90nm Technology Journal title: International Journal of Research in Computer and Communication Technology Authors: J Manohar, Ch. Janardhan, K.V. Ramanaiah Subject(s): Computer and Information Science, Telecommunications
Power Gating Techniques for Nano-Scale Devices Journal title: GRD Journal for Engineering Authors: Srujan Tirupati, Praveen Nimmagadda Subject(s):
On the Construction of Ground Bounce Noise Reduction Using Three - Step Wake-Up Partitioning Journal title: International Journal of engineering Research and Applications Authors: Ms.N. Archana, Dr.K. Muthulakshmi, Ms.S.Nithya Devi Subject(s):
