A METHOD FOR TRANSLATING PSEUDOCODE TO HDL VIA FINITE AUTOMATA
Journal Title: Scientific Bulletin, Series: Electronics and Computer Science - Year 2014, Vol 14, Issue 1
Abstract
While combinatorial logic circuit design methods are very easy to understand and automate, sequential logic circuit design is difficult for those that are new to the field. Textbooks focus on translating graphs into logic circuits, but very little is said about how these graphs can be easily obtained. We present a method that is intended to help software programmers enter the realm of logic circuit design. At the core of the method is a finite automaton based representation of the algorithm, which is then turned into a high-level logic circuit diagram that is easily translatable to hardware description language (HDL). The paper presents a detailed description of the method. It also contains an example as well as a discussion on benefits and drawbacks.
Authors and Affiliations
Florin-Marian BÎRLEANU
Keywords
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