slugA Novel Approach ForHost-Compiled Processor Model With Cache And PipeliningIntegration
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2014, Vol 2, Issue 4
Abstract
In the increasing model of the embedded system software solutions host compiled as well as the Real Time Operating System made the dramatic added applications for the mobile applications all over the world. However, designerspay the price for higher performance with a loss in timing accuracy.In this work, we introduce a novel predictive OS model toprovide fast software simulation with accurate scheduling of periodicreal-time tasks. The OS model predicts the next preemptionpoint by monitoring system state, and automatically and optimallyadjusting the granularity of back-annotated delays. We evaluatedour simulator on a range of periodic task sets. Our observationsshow that we can achieve the same 99% accuracy as a simulationat 1 s granularity with an average 230x speedup.
Authors and Affiliations
N. Vinothini, T. Uma Maheswari, K. Kannan, M. Sankar
Web Server Based Agriculture Automation Using Sensor Network
automatic irrigation scheme helps the farmer to irrigate the land in well-organized method can be explained in these thesis. This system helps to reduce water usage in agricultural field. Remote sensor unit gives inform...
Design of Multiplier and Divider Using Reversible Logic Gates with Vedic Mathematical Approach
Arithmetic operations are the main components in any design of Digital signal processing or microcontrollers. Multipliers and Divider circuits includes the adders and substations. The main requirements of Digital Signal...
Selective Harmonic Elimination for Solar Cell based Multi-Level Inverter System Using Moth Flame Optimization
Themulti level inverter is powerful electronic device, which is widely used for high power utility application. The main purpose of the multi-level inverter is to provide sinusoidal wave from with low-level harmonic con...
A Novel Approach For Indian Currency Denomination Identification
it is very difficult to count different denomination notes in a bunch especially in banking. This paper proposes an image processing technique to extract paper currency denomination. The extracted ROI (Region of Interes...
D Flip Flop with Low Power Clocking System by using MTCMOS and Slumber Keeper Technique
power utilization plays an significant function in any integrated circuit. We are having three main challenges in semiconductor technology. in any integrated circuit clock sharing networks and storage elements such as f...